This invention relates to a microprocessor based system for providing video control signals. Systems of this type feature a DOT (pixel) clock. The timing of control signals such as, for example, frame synchronization, vertical drive, vertical synchronization, vertical blank, composite synchronization and composite blank signals, is user specified and programmable. These signals are used to synchronize external equipment and/or to generate analog composite video signals for testing a cathode ray tube (CRT) display.
Input parameters in the system are dictated by particular requirements and may include: vertical synchronization/frequency; the number of horizontal periods per field; the width of a horizontal front porch; the width of horizontal synchronization; the width of a horizontal back porch; the number of active pixels (dots) per horizontal period; and the total number of pixels (dots) per horizontal period. These parameters determine the output frequency requirements of the DOT (pixel) clock used in the system and referred to above.
The present invention provides the desired results without the need for repetitive circuitry as has heretofore been the case, and without compromising system performance which is desirable.